Dynamic Reconfiguration in Reconfigurable System-on-Chip Design Flow

In recent years, reconfigurable system-on-chip has become a promising technical solution for complicated computation in scientific research and embedded implementations. In light of lacking a complete overview of the whole design flow for dynamically reconfigurable system, and a transparent programming process for system designers, this paper proposes a new design methodology based on function-level programming model at system level. In the programming model, designers can use high-level language to complete functional specification by calling the co-function-library. At detailed design level, an online real-time scheduling algorithm based on speed-up ratio is used to manage reconfigurable resources. At implementation level, the key technologies in implementing a prototype system are described. And experiments and tests have verified that the efficiency of system development is enhanced by placing run-time reconfiguration problem into the whole design flow.