Advanced Search
    JIANG Jianhui, YUAN Chunxin. Online Testing Techniques for Chip-Level SystemsJ. Journal of Computer Research and Development, 2004, 41(9): 1593-1603.
    Citation: JIANG Jianhui, YUAN Chunxin. Online Testing Techniques for Chip-Level SystemsJ. Journal of Computer Research and Development, 2004, 41(9): 1593-1603.

    Online Testing Techniques for Chip-Level Systems

    • Online testing is one of the fundamental fault tolerant techniques It is traced from three lines: error control codes, replication and comparison, and on line monitoring The development history and the achievements in 1990’s , including chip design schemes, prototypes, and products, are emphasized The existing results show that the online testing techniques are now merged into the design of high performance processors
    • loading

    Catalog

      Turn off MathJax
      Article Contents

      /

      DownLoad:  Full-Size Img  PowerPoint
      Return
      Return