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    LIU Jinshui. The Design of HALT-positive Wake-up Synchronization CircuitJ. Journal of Computer Research and Development, 1991, 28(9): 25-30.
    Citation: LIU Jinshui. The Design of HALT-positive Wake-up Synchronization CircuitJ. Journal of Computer Research and Development, 1991, 28(9): 25-30.

    The Design of HALT-positive Wake-up Synchronization Circuit

    • Synchronization is one of the most challenging problems in the design of shared memory multiprocessors and parallel programs.The principle and the implementation method of HALT-positive wake-up synchronization circuit which efficiently supports the synchronization of multiprocessors are presented in this paper.The major features of the HALT circuit include high synchronization speed,good real-time processing ability,convenience of programming,and ease of integration and implementation.All of these features make it particularly suitable to the fine-grained parallelism.
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