Safe Logic Elements CMOS B/T Logical Circuits and Their Noise Margins

In this paper,the fault tolerant computing techniques are classified into three classes, that is,fault diagnosis technique,resourses redundancy technique and fail-safe technique.Based on the analysis of traditional fail-safe and self-checking techniques,a unified conceptual model of safe logic systems is developed,and some classes of safe elemeats are diseussed.As a class of extended fail-safe logical element,CMOS 2-of-3 valued logical circuits are analyzed,The definition and gragh method of noise margin of CMOS 2-of-3 valued logical elcments are proposed.