Optimization of Parallel Computation on Sparse Matrix-Vector Multiplication with High Predictability

Xia Tian; Fu Gelin; Qu Shaoru; Luo Zhongpei; Ren Pengju

doi:10.7544/issn1000-1239.202330421

Journal of Computer Research and Development > 2023 > 60(9): 1973-1987. > DOI: 10.7544/issn1000-1239.202330421

Xia Tian, Fu Gelin, Qu Shaoru, Luo Zhongpei, Ren Pengju. Optimization of Parallel Computation on Sparse Matrix-Vector Multiplication with High Predictability[J]. Journal of Computer Research and Development, 2023, 60(9): 1973-1987. DOI: 10.7544/issn1000-1239.202330421

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Optimization of Parallel Computation on Sparse Matrix-Vector Multiplication with High Predictability

Xia Tian^{1, 2, 3},
Fu Gelin³,
Qu Shaoru³,
Luo Zhongpei³,
Ren Pengju^{1, 2, 3,}

1.
National Key Laboratory of Human-Machine Hybrid Augmented Intelligence(Xi’an Jiaotong University), Xi’an 710049
2.
National Engineering Research Center of Visual Information and Applications(Xi’an Jiaotong University), Xi’an 710049
3.
Institute of Artificial Intelligence and Robotics, Xi’an Jiaotong University, Xi’an 710049

Funds: This work was supported by the National Key Research and Development Program of China（2022YFB4500500）and the Key Research and Development Program of Shaanxi Province（2022ZDLGY01-08）.

More Information

Author Bio:
Xia Tian: born in 1988. PhD, associate professor. His main research interests include cloud-computing virtualization and innovative parallel computation architecture

Fu Gelin: born in 1997. PhD candidate. His main research interests include system modeling and optimization, and computer architecture

Qu Shaoru: born in 2000. Master candidate. His main research interests include high performance computing and computer architecture

Luo Zhongpei: born in 1999. Master candidate. His main research interests include high performance computing and GPGPU technology

Ren Pengju: born in 1984. PhD, professor. His main interests include on-chip network and computer architecture
Received Date: May 30, 2023
Revised Date: July 24, 2023
Available Online: July 31, 2023

Graphical Abstract

Abstract

Abstract

Sparse matrix-vector multiplication (SpMV) has been widely applied in scientific computation, industry simulation and intelligent computation domains, which is the critical algorithm in all these applications. Usually, iterative computation of SpMV is required to fulfill precise numeric simulation, linear algebra solving and graph analytics requirements. However, due to the poor data locality, low cache usage and extreme irregular computation patterns caused by the highly sparse and random distributions, SpMV optimization has become one of the most challenging problems for modern high-performance processors. In this paper, we study the bottlenecks of SpMV on current out-of-order CPUs and propose to improve its performance by pursuing high predictability and low program complexity. Specifically, we improve the memory access regularity and locality by creating serialized access patterns so that the data prefetching efficiency and cache usage are optimized. We also improve the pipeline efficiency by creating regular branch patterns to make the branch prediction more accurate. Meanwhile, we flexibly lever the SIMD instructions to optimize the parallel execution and fully use CPU’s computation resources. Experimental results show that using the above optimization approaches, our SpMV kernel is effective to significantly alleviate the critical bottlenecks and improve the efficiency of CPU pipeline, cache and memory bandwidth usage. The resulting performance achieves average 2.6 times speedup against Intel’s commercial library of MKL, as well as average 1.3 times speedup against the existing best SpMV algorithm.
- matrix-vector multiplication,
- sparse matrix computation,
- matrix format,
- branch prediction,
- data prefetching

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References (24)

References

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