Function Verification of Godson-2 Processor
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Abstract
Developing a new leading edge Godson-2 processor is an immensely complicated undertaking. In the case of Godson-2 processor, the micro-architecture is significantly more complex than the previous Godson 1 processor and how to ensure the function correctness is a great challenge to verification participants. Simple architectural level tests are insufficient to gain confidence in the quality of the design. Detailed plan must be combined with a broad collection of methods and tools to ensure that design defects are detected as early as possible. Described in this paper are the verification flow and methodology in the Godson-2 processor design prior to tape out. Simulation is the dominant method in the design, and the state of art formal method are also used to verify some parts of the design.
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