Design of System Area Network Adapter

An effective system area network (SAN) adapter is critical to the achievement of a high-performance cluster system. The design of SAN adapter based on the Intel IOP310 I/O processor chipset, a universal embedded system, is proposed in this paper. It is a part of DCNet, which is the SAN of Dawning 4000A cluster. In the adapter architecture, the memory bus is extended to be a local bus for system peripheral interconnects, and a network interface unit (NIU) based on the local bus is implemented and embedded. All these innovations not only thoroughly compensate for the lack of high-performance data channel in the embedded system, but also efficiently utilize the memory bus bandwidth and DMA engine to reduce the latency for data transfer between the host and network. Furthermore, the Intel IOP310 I/O processor chipset makes it powerful for the adapter to offload the processing of communication protocol from the host CPU. The testing results show that the adapter obtains competitive communication performance compared with Myrinet, SCI, and QsNet, and prove that the way to design a high-performance adapter based on embedded system is feasible and effective.